Impact of interfacial layer using ultra-thin SiO2 on electrical and structural characteristics of Gd2O3 MOS capacitor

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dc.authorid0000-0001-8152-9122en_US
dc.authorid0000-0002-1836-7033
dc.authorid0000-0003-3909-2662
dc.authorid0000-0002-6652-4662
dc.contributor.authorKahraman, Ayşegül
dc.contributor.authorGürer, Umutcan
dc.contributor.authorLök, Ramazan
dc.contributor.authorKaya, Şenol
dc.contributor.authorYılmaz, Ercan
dc.date.accessioned2021-06-23T19:49:28Z
dc.date.available2021-06-23T19:49:28Z
dc.date.issued2018
dc.departmentBAİBÜ, Rektörlük, Nükleer Radyasyon Dedektörleri Uygulama ve Araştırma Merkezien_US
dc.description.abstractThe aim of present study is to improve the quality of Gd2O3/p-Si MOS structure by reducing interface trap charge density. Therefore, the ultra-thin SiO2 layer was grown to high-k/Si interface. The effect of the post deposition annealing on the structural properties of the Gd2O3/SiO2 films and electrical characteristics of the Al/Gd2O3/SiO2/p-Si/Al were investigated for three different temperature. Besides, the effect of the series resistance and measurement frequency on the electrical characteristics of the p-MOS capacitors was examined in detail. 118 nm-thick Gd2O3 films were grown by RF magnetron sputtering following the 5 nm-thick SiO2 deposition on p type Si wafer by dry oxidation method. While the Gd2O3 monoclinic characteristic peaks were observed in the Gd2O3/SiO2/Si structures annealed at 600 A degrees C and 800 A degrees C, the XRD spectra of as-deposited and annealed at 400 A degrees C sample pointed out Gd silicate formation. -Si, -O, -Gd, and -H bonds were defined in the FTIR spectra of all samples. The frequency dependent capacitance-voltage (C-V) and conductance-voltage (G/omega-V) characteristics of Gd2O3/SiO2 MOS capacitor were measured. Strong accumulation capacitance values in these devices did not change significantly depending on frequency. Unlike from the MOS capacitor with as-deposited and annealed Gd2O3/SiO2 at 400 A degrees C, the interface trap charge density increased with increasing voltage frequency for the samples annealed at 600 A degrees C and 800 A degrees C. No significant change in the border trap density with increasing frequency was observed in the MOS capacitor except for as-deposited device. The barrier height increased with increasing frequency for all Gd2O3/SiO2 MOS capacitors.en_US
dc.identifier.doi10.1007/s10854-018-9847-9
dc.identifier.endpage17482en_US
dc.identifier.issn0957-4522
dc.identifier.issn1573-482X
dc.identifier.issue20en_US
dc.identifier.scopus2-s2.0-85051870962en_US
dc.identifier.scopusqualityQ2en_US
dc.identifier.startpage17473en_US
dc.identifier.urihttps://doi.org/10.1007/s10854-018-9847-9
dc.identifier.urihttps://hdl.handle.net/20.500.12491/9517
dc.identifier.volume29en_US
dc.identifier.wosWOS:000445428900045en_US
dc.identifier.wosqualityQ2en_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.institutionauthorGürer, Umutcan
dc.institutionauthorLök, Ramazan
dc.institutionauthorKaya, Şenol
dc.institutionauthorYılmaz, Ercan
dc.language.isoenen_US
dc.publisherSpringeren_US
dc.relation.ispartofJournal Of Materials Science-Materials In Electronicsen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectUltra-Thin SiO2en_US
dc.subjectGd2O3 MOS Capacitor
dc.subjectInterfacial Layer
dc.titleImpact of interfacial layer using ultra-thin SiO2 on electrical and structural characteristics of Gd2O3 MOS capacitoren_US
dc.typeArticleen_US

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