Design of a 5-Bit fully parallel analog to digital converter using common gate differrential mos pair-based comparator
dc.authorid | 0000-0001-7664-103X | en_US |
dc.contributor.author | Aytar, Oktay | |
dc.date.accessioned | 2021-06-23T19:37:44Z | |
dc.date.available | 2021-06-23T19:37:44Z | |
dc.date.issued | 2015 | |
dc.department | BAİBÜ, Mühendislik Fakültesi, Elektrik Elektronik Mühendisliği Bölümü | en_US |
dc.description.abstract | This paper presents a novel comparator structure based on the common gate differential MOS pair. The proposed comparator has been applied to fully parallel analog to digital converter (A/D converter). Furthermore, this article presents 5 bit fully parallel A/D Converter design using the cadence 105 141 design platform and NCSU(North Carolina State University) design kit with 0.18 mu m CMOS technology library. The proposed fully parallel A/D converter consist of resistor array block, comparator block, 1-n decoder block and programmable logic array. The 1-n decoder block includes latch block and thermometer code circuit that is implemented using transmission gate based multiplexer circuit. Thus, sampling frequency and analog bandwidth are increased. The INL and DNL of the proposed fully parallel A/D converter are (0/ + 0.63) LSB and (-0.26/ + 0.31) LSB at a sampling frequency of 5 GS/s with an input signal of 50 MHz, respectively. The proposed fully parallel A/D Converter consumes 340 mW from 1.8 V supply. | en_US |
dc.identifier.doi | 10.2478/jee-2015-0041 | |
dc.identifier.endpage | 256 | en_US |
dc.identifier.issn | 1335-3632 | |
dc.identifier.issn | 1339-309X | |
dc.identifier.issue | 5 | en_US |
dc.identifier.scopus | 2-s2.0-84945193792 | en_US |
dc.identifier.scopusquality | Q3 | en_US |
dc.identifier.startpage | 250 | en_US |
dc.identifier.uri | https://doi.org/10.2478/jee-2015-0041 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12491/8205 | |
dc.identifier.volume | 66 | en_US |
dc.identifier.wos | WOS:000365830700002 | en_US |
dc.identifier.wosquality | Q4 | en_US |
dc.indekslendigikaynak | Web of Science | en_US |
dc.indekslendigikaynak | Scopus | en_US |
dc.institutionauthor | Aytar, Oktay | |
dc.language.iso | en | en_US |
dc.publisher | Slovak Univ Technology | en_US |
dc.relation.ispartof | Journal Of Electrical Engineering-Elektrotechnicky Casopis | en_US |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/openAccess | en_US |
dc.subject | Fully Parallel A/D Converter | en_US |
dc.subject | Common Gate Differential MOS Pair | en_US |
dc.subject | Transmission Gate Based Multiplexer Circuit | en_US |
dc.subject | High Speed A/D Converter | en_US |
dc.title | Design of a 5-Bit fully parallel analog to digital converter using common gate differrential mos pair-based comparator | en_US |
dc.type | Article | en_US |
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