Design of a 5-Bit fully parallel analog to digital converter using common gate differrential mos pair-based comparator
Yükleniyor...
Dosyalar
Tarih
2015
Yazarlar
Dergi Başlığı
Dergi ISSN
Cilt Başlığı
Yayıncı
Slovak Univ Technology
Erişim Hakkı
info:eu-repo/semantics/openAccess
Özet
This paper presents a novel comparator structure based on the common gate differential MOS pair. The proposed comparator has been applied to fully parallel analog to digital converter (A/D converter). Furthermore, this article presents 5 bit fully parallel A/D Converter design using the cadence 105 141 design platform and NCSU(North Carolina State University) design kit with 0.18 mu m CMOS technology library. The proposed fully parallel A/D converter consist of resistor array block, comparator block, 1-n decoder block and programmable logic array. The 1-n decoder block includes latch block and thermometer code circuit that is implemented using transmission gate based multiplexer circuit. Thus, sampling frequency and analog bandwidth are increased. The INL and DNL of the proposed fully parallel A/D converter are (0/ + 0.63) LSB and (-0.26/ + 0.31) LSB at a sampling frequency of 5 GS/s with an input signal of 50 MHz, respectively. The proposed fully parallel A/D Converter consumes 340 mW from 1.8 V supply.
Açıklama
Anahtar Kelimeler
Fully Parallel A/D Converter, Common Gate Differential MOS Pair, Transmission Gate Based Multiplexer Circuit, High Speed A/D Converter
Kaynak
Journal Of Electrical Engineering-Elektrotechnicky Casopis
WoS Q Değeri
Q4
Scopus Q Değeri
Q3
Cilt
66
Sayı
5
