A 10 GS/s time-interleaved ADC in 0.25 micrometer CMOS technology

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dc.authorid0000-0002-0569-6399en_US
dc.authorid0000-0001-7664-103Xen_US
dc.authorid0000-0002-1581-3894
dc.contributor.authorAytar, Oktay
dc.contributor.authorTangel, Ali
dc.contributor.authorAfacan, Engin
dc.date.accessioned2021-06-23T19:45:08Z
dc.date.available2021-06-23T19:45:08Z
dc.date.issued2017
dc.departmentBAİBÜ, Mühendislik Fakültesi, Elektrik Elektronik Mühendisliği Bölümüen_US
dc.description.abstractThis paper presents design and simulation of a 4-bit 10 GS/s time interleaved ADC in 0.25 micrometer CMOS technology. The designed TI-ADC has 4 channels including 4-bit flash ADC in each channel, in which area and power efficiency are targeted. Therefore, basic standard cell logic gates are preferred. Meanwhile, the aspect ratios in the gate designs are kept as small as possible considering the speed performance. In the literature, design details of the timing control circuits have not been provided, whereas the proposed timing control process is comprehensively explained and design details of the proposed timing control process are clearly presented in this study. The proposed circuits producing consecutive pulses for timing control of the input S/H switches (ie the analog demultiplexer front-end circuitry) and the very fast digital multiplexer unit at the output are the main contributions of this study. The simulation results include +0.26/-0.22 LSB of DNL and +0.01/-0.44 LSB of INL, layout area of 0.27 mm(2), and power consumption of 270 mW. The provided power consumption, DNL and INL measures are observed at 100 MHz input with 10 GS/s sampling rate.en_US
dc.identifier.doi10.1515/jee-2017-0076
dc.identifier.endpage424en_US
dc.identifier.issn1335-3632
dc.identifier.issn1339-309X
dc.identifier.issue6en_US
dc.identifier.scopus2-s2.0-85041280052en_US
dc.identifier.scopusqualityQ3en_US
dc.identifier.startpage415en_US
dc.identifier.urihttps://doi.org/10.1515/jee-2017-0076
dc.identifier.urihttps://hdl.handle.net/20.500.12491/9105
dc.identifier.volume68en_US
dc.identifier.wosWOS:000423261700002en_US
dc.identifier.wosqualityQ4en_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.institutionauthorAytar, Oktay
dc.language.isoenen_US
dc.publisherSlovak Univ Technologyen_US
dc.relation.ispartofJournal Of Electrical Engineering-Elektrotechnicky Casopisen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectAnalog-to-Digital Convertersen_US
dc.subjectCMOS ADCen_US
dc.subjectTime Interleaved ADCen_US
dc.subjectFlash ADCen_US
dc.titleA 10 GS/s time-interleaved ADC in 0.25 micrometer CMOS technologyen_US
dc.typeArticleen_US

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