Marjanovic, M.Gürer, UmutcanMitrovic, N.Yılmaz, OzanDankovic, D.Budak, ErhanYılmaz, Ercan2024-09-252024-09-252023979-835034776-0https://doi.org/10.1109/MIEL58498.2023.10315808https://hdl.handle.net/20.500.12491/12324IEEE Electron Devices Society (EDS)33rd IEEE International Conference on Microelectronics, MIEL 2023 -- 16 October 2023 through 18 October 2023 -- Nis -- 194545This paper will present guidelines for creating a SPICE model of RADFETs with different gate oxide thicknesses. Model parameters, such as threshold voltage and carrier mobility, were extracted from the transfer characteristics in the saturation region. The model was satisfactorily used to simulate RADFETs with oxide thicknesses ranging from 40 nm to 300 nm. © 2023 IEEE.eninfo:eu-repo/semantics/closedAccessGates (Transistor)Threshold VoltageGate Oxide ThicknessModeling ParametersOxide ThicknessSaturation RegionSPICE ModelingTransfer CharacteristicsSPICEConference Object10.1109/MIEL58498.2023.103158082-s2.0-85183083250N/A